1. Field of the Invention
The present invention relates to a carrier for a multistage coupling semiconductor, a semiconductor device using this carrier, and a manufacturing method of this semiconductor device.
2. Description of the Related Art
A semiconductor device coupled at four stages will be described as an example of a prior art. As shown in FIGS. 1(A) to 1(D), in case of a first stage E board 11, the E board 11 has a pattern that among chip selector pads b to e, only pad b is connected to a multistage connection pad 23 by a pattern 21 (see FIG. 1(A)). Similar to the first stage E board 11, in case of a second stage F board 12, the board has a pattern that among chip selector pad b to e, only pad c is connected by a pattern 21 (see FIG. 1(B)). Similar to the cases of the E and F boards, a third stage G board 13 has a pattern that a connection is made only for pad d (see FIG. 1(C)), and a fourth stage H board has a pattern that only a connection is made for pad e (see FIG. 1(D)). Specifically, in the prior art, carriers having different circuit patterns have been manufactured for the first to fourth substrates.
In the foregoing prior art, for example, in the case of the semiconductor device where four stages are coupled, the circuit patterns of the carriers of the boards have been different from first to fourth stages. For this reason, such a semiconductor device has drawbacks in that four kinds of pattern design, glass masks carriers, and electrical characteristic inspections are necessary for the four boards so that cost of the semiconductor device increases. Moreover, when non-defective percentages are different among the circuit patterns of the four boards, the yield percentage of the final product of the semiconductor device is restricted to the value of the lowest non-defective percentage. At the same time, the residual products including defective boards are treated as defective stocks. Moreover, managing cost increases because of variety of kinds of the circuit patterns.